LCDs are electronically controlled light valves that use a white “backlight,” such as lighting emitting diodes (LEDs) and cold-cathode fluorescent lamps (CCFLs), to illuminate the color screen. Nowadays, the CCFLs play an increasing role in backlight applications for highest available efficiency. However, it requires a high alternating voltage (AC) voltage to ignite and operate the CCFLs. Typically, the igniting voltage is approximately 2 to 3 times larger than the operating voltage that is approximately 1000 volts for a longer lamp. To generate such a high AC voltage from a direct current (DC) power source, e.g., a rechargeable battery, DC/AC inverters with various CCFL drive architectures including Royer (self-oscillating), half-bridge, full-bridge and push-pull have been implemented. Moreover, dimming control techniques are also developed to control the brightness of the CCFLs. Especially, pulse width modulation (PWM) dimming is rapidly becoming an optional choice since it is less display-sensitive and offers more flexibility in choosing brightness levels.
However, during the PWM dimming, the inverter is actually being turned on and off at the PWM frequency, so that there will be a large ripple current on the power supply line of the inverter. Additionally, those stated CCFL drive architectures are typically used to drive one CCFL. In recent years, there has been increasing interest in large size LCD displays, as required in LCD TV sets and computer monitors, which require multiple CCFLs for proper backlighting.
A block diagram of a prior art circuit 100 for supplying power to multiple CCFLs is depicted in FIG. 1. The circuit 100 is composed of a DC power source 110, a plurality of DC/AC inverters 120A to 120N, a plurality of CCFL loads 130A to 130N, and a controller 140. Each DC/AC inverter, 120A to 120N, converts a DC voltage from the DC power source 110 into an AC voltage. Each CCFL load, 130A to 130N, is individually powered by one of the DC/AC inverters, 120A to 120N. The controller 140 provides a synchronous PWM dimming signal to the DC/AC inverters, 120A to 120N, for controlling the DC to AC voltage conversion. Due to the synchronous PWM dimming signal, there is a large current ripple on a power bus 150 that is coupled between the DC power source 110 and the DC/AC inverters, 120A to 120N.
Because of the large current ripple, the current fed to the DC/AC inverters may be high enough to upset other devices. The current ripple is a prime source of electromagnetic interference (EMI). Thus, the current ripple on the power bus 150 is a cause of concern to system designers. In general, the designer will place input inductor and bulk capacitors at the power supply to reduce the current ripple on the power line 150. This method is only effective for the high frequency current ripple. For the low frequency current ripple with several hundreds hertz (Hz), it is not effective. That is, a low frequency PWM dimming may complicate the DC supply design requirements and give rise to unwanted visual artifacts on an LCD panel.
FIG. 2 illustrates a block diagram of another prior art circuit 200 for powering multiple CCFLs. For simplicity, description of the circuit 200 that is similar with the circuit in FIG. 1 is herein omitted and only the improvement is depicted in details. The circuit 200 includes a plurality of controllers 210A to 210N for supplying a string of phase-shifted dimming signals PWM1 to PWMN respectively to the plurality of DC/AC inverters 120A to 120N. Controlled by a respective phased-shifted dimming signal, each DC/AC inverter has 360°/N phase shift between the consecutive DC/AC inverters, where N is the number of the DC/AC inverters. Due to the string of the phase-shifted dimming signals PWM1 to PWMN, the current ripple on the power bus 150 is effectively reduced to 1/N of the current ripple in FIG. 1.
Furthermore, those skilled in the art will recognize that the light emitting diodes (LEDs) may replace the CCFLs for backlight purpose and consequently DC/DC converters may replace the DC/AC inverters for powering the LEDs in FIGS. 1 and 2.
FIG. 3 illustrates emulation diagrams for the circuits in FIGS. 1 and 2. In FIG. 3, a plot (A) shows the current ripple emulated on a basis of the circuit 100 in FIG. 1, and a plot (B) shows the current ripple emulated on a basis of the circuit 200 in FIG. 2. Herein, the circuits in FIGS. 1 and 2 include 6 DC/AC inverters and 6 CCFLs. Referring to the plot (A), it can be observed that when the DC voltage is 24 volts and the maximum input power is approximately 100 watts during the full dimming, the peak to valley value of the current is approximately 4 amperes as the dimming duty is approximately 50%. Referring to the plot (B), it can be observed that when the DC voltage is 24 volts and the maximum input power is approximately 100 watts during the full dimming, the peak to valley value of the current is approximately 0.7 ampere as each of the dimming signals PWM1 to PWM6 has identical dimming duty of approximately 50% and equal phase delay relative to successive dimming signals. The current ripple in the circuit 200 is approximately ⅙ of the current ripple in the circuit 100.
Though the circuit in FIG. 2 can reduce the current ripple, the number of the controllers is increased greatly. Additionally, each CCFL load is powered by an individual DC/AC inverter in both circuits 100 and 200, the element count is large and in turn the overall cost and circuit size are tremendous.